Electronics and Communication Engineering
GATE ECE exam:gate PYQs
Build your understanding with focused practice from past exam papers.
Questions 221–230 of 715. Imported answers require independent review unless marked reviewed.
Question 26
Open questionECMCQ1 markNeeds review
Consider a system with input
and output
. The system isYour answerChoose one option.
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Open questionECMCQ1 markNeeds review
Let
be a strictly band-limited signal with bandwidth
and energy
. Assuming
, the energy in the signal
isYour answerChoose one option.
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Open questionECMCQ1 markNeeds review
The Fourier transform
of
isNote:
Your answerChoose one option.
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You can attempt this question now. Sign in to view the answer key, explanations and discussion.Log in to check answerQuestion 29
Open questionECMCQ1 markNeeds review
In the table shown below, match the signal type with its spectral characteristics.
Signal type | Spectral characteristics |
|---|---|
(i) Continuous, aperiodic | (a) Continuous, aperiodic |
(ii) Continuous, periodic | (b) Continuous, periodic |
(iii) Discrete, aperiodic | (c) Discrete, aperiodic |
(iv) Discrete, periodic | (d) Discrete, periodic |
Your answerChoose one option.
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Open questionECMSQ1 markNeeds review
For a real signal, which of the following is/are valid power spectral density/densities?
Your answerSelect all correct options. You can choose more than one.
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Open questionECNAT1 markNeeds review
The signal-to-noise ratio (SNR) of an ADC with a full-scale sinusoidal input is given to be 61.96 dB. The resolution of the ADC is ______ bits (rounded off to the nearest integer).
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Open questionECNAT1 markNeeds review
In the circuit shown below, the current
flowing through 200
resistor is ______ mA (rounded off to two decimal places). 
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Open questionECNAT1 markNeeds review
For the two port network shown below, the [Y]-parameters is given as
The value of load impedance
, in
, for maximum power transfer will be ______ (rounded off to the nearest integer). 
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Open questionECNAT1 markNeeds review
For the circuit shown below, the propagation delay of each NAND gate is 1 ns. The critical path delay, in ns, is ______ (rounded off to the nearest integer).
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Open questionECNAT1 markNeeds review
In the circuit shown below, switch S was closed for a long time. If the switch is opened at
, the maximum magnitude of the voltage
, in volts, is ______ (rounded off to the nearest integer). 
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