GATE ECE year:2025 PYQs & Answers — Page 3

Questions 21–30 of 65. Imported answers require independent review unless marked reviewed.

A simplified small-signal equivalent circuit of a BJT-based amplifier is given below. The small-signal voltage gain

(in V/V) is ________.

Diagram for Electronics and Communication Engineering question 21

Your answerChoose one option.

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The ideal BJT in the circuit given below is biased in the active region with a

of 100. If

is 10

A, then

(in Volts, rounded off to two decimal places) is ______ .

Diagram for Electronics and Communication Engineering question 22

Your answerChoose one option.

4.05

3.03

1.92

3.73

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A 3-input majority logic gate has inputs

, and

. The output

of the gate is logic ‘1’ if two or more of the inputs are logic ‘1’. The output

is logic ‘0’ if two or more of the inputs are logic ‘0’. Which one of the following options is a Boolean expression of the output

Your answerChoose one option.

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A full adder and an XOR gate are used to design a digital circuit with inputs X, Y, and Z, and output F, as shown below. The input Z is connected to the carry-in input of the full adder.

If the input Z is set to logic ‘1’, then the circuit functions as ______ with X and Y as inputs.

Diagram for Electronics and Communication Engineering question 24

Your answerChoose one option.

an adder

a subtractor

a multiplier

a binary to Gray code converter

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Consider the function

, defined as

Which of the following statements is/are correct?

(Here,

is the set of real numbers.)

Your answerSelect all correct options. You can choose more than one.

has no global maximizer

has no global minimizer

is a local minimizer of

is a local maximizer of

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Consider the unity-negative-feedback system shown in Figure (i) below, where gain

. The root locus of this system is shown in Figure (ii) below.

Diagram for Electronics and Communication Engineering question 26

Diagram for Electronics and Communication Engineering question 26 (figure 2)

For what value(s) of

will the system in Figure (i) have a pole at

Your answerSelect all correct options. You can choose more than one.

For no positive value of

For all positive values of

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Let

be a discrete-time signal whose z-transform is

. Which of the following statements is/are TRUE?

Your answerSelect all correct options. You can choose more than one.

The discrete-time Fourier transform (DTFT) of

always exists

The region of convergence (RoC) of

contains neither poles nor zeros

The discrete-time Fourier transform (DTFT) exists if the region of convergence (RoC) contains the unit circle

, where

is the unit impulse and

is a scalar, then the region of convergence (RoC) is the entire z-plane

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Consider a message signal

which is bandlimited to

, where

is in Hz. Consider the following two modulation schemes for the message signal:

• Double sideband-suppressed carrier (DSB-SC):

• Amplitude modulation (AM):

Here,

and

are the amplitude and frequency (in Hz) of the carrier, respectively. In the case of AM,

denotes the modulation index.

Consider the following statements: (i) An envelope detector can be used for demodulation in the DSB-SC scheme if

for all

. (ii) An envelope detector can be used for demodulation in the AM scheme only if

for all

Which of the following options is/are correct?

Your answerSelect all correct options. You can choose more than one.

(i) is TRUE

(i) is FALSE

(ii) is TRUE

(ii) is FALSE

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Which of the following statements is/are TRUE with respect to an ideal opamp?

Your answerSelect all correct options. You can choose more than one.

It has an infinite input resistance

It has an infinite output resistance

It has an infinite open-loop differential gain

It has an infinite open-loop common-mode gain

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Which of the following statements is/are TRUE with respect to ideal MOSFET-based DC-coupled single-stage amplifiers having finite load resistors?

Your answerSelect all correct options. You can choose more than one.

The common-gate amplifier has an infinite input resistance

The common-source amplifier has an infinite input resistance

The input and output voltages of the common-source amplifier are in phase

The input and output voltages of the common-drain amplifier are in phase

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GATE ECE year:2025 PYQs

Question 21

Question 22

Question 23

Question 24

Question 25

Question 26

Question 27

Question 28

Question 29

Question 30