GATE EE topic:electrical-machines PYQs & Answers — Page 26

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Questions 251–260 of 715. Imported answers require independent review unless marked reviewed.

Topic practice 715 questionsPage 26 of 72

Neglecting the delays due to the logic gates in the circuit shown in figure, the decimal equivalent of the binary sequence [ABCD] of initial logic states, which will not change with clock, is ____________.

Diagram for Electrical Engineering question 56

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In a given 8-bit general purpose micro-controller there are following flags.

C-Carry, A-Auxiliary Carry, O-Overflow flag, P-Parity (0 for even, 1 for odd)

R0 and R1 are the two general purpose registers of the micro-controller.

After execution of the following instructions, the decimal equivalent of the binary sequence of the flag pattern [CAOP] will be ________.

MOV R0, +0x60

MOV R1, +0x46

ADD R0, R1

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The single phase rectifier consisting of three thyristors T₁, T₂, T₃ and a diode D₁ feed power to a 10 A constant current load. T₁ and T₃ are fired at α = 60° and T₂ is fired at α = 240°. The reference for α is the positive zero crossing of vᵢₙ. The average voltage Vₒ across the load in volts is _____ (Round off to 2 decimal places).

Diagram for Electrical Engineering question 58

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The Zener diode in circuit has a breakdown voltage of 5 V. The current gain β of the transistor in the active region in 99. Ignore base-emitter voltage drop V_BE. The current through the 20 Ω resistance in milliamperes is _______(Round off to 2 decimal places).

Diagram for Electrical Engineering question 59

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The two-bus power system shown in figure (i) has one alternator supplying a synchronous motor load through a Y-Δ transformer. The positive, negative and zero-sequence diagrams of the system are shown in figures (ii), (iii) and (iv), respectively. All reactances in the sequence diagrams are in p.u. For a bolted line-to-line fault (fault impedance = zero) between phases ‘b’ and ‘c’ at bus 1, neglecting all pre-fault currents, the magnitude of the fault current (from phase ‘b’ to ‘c’) in p.u. is __________ (Round off to 2 decimal places).

Diagram for Electrical Engineering question 60

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An infinite surface of linear current density

A/m exists on the x-y plane, as shown in the figure. The magnitude of the magnetic field intensity (H) at a point (1,1,1) due to the surface current in Ampere/meter is ________ (Round off to 2 decimal places).

Diagram for Electrical Engineering question 61

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The closed curve shown in the figure is described by

The magnitude of the line integral of the vector field

around the closed curve is ________ (Round off to 2 decimal places).

Diagram for Electrical Engineering question 62

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A signal

is sampled at 200 Hz and then passed through an ideal low pass filter having cut-off frequency of 100 Hz. The maximum frequency present in the filtered signal in Hz is ____________ (Round off to the nearest integer).

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A balanced delta connected load consisting of the series connection of one resistor (R = 15 Ω) and a capacitor (C = 212.21 μF) in each phase is connected to three-phase, 50 Hz, 415 V supply terminals through a line having an inductance of L = 31.83 mH per phase, as shown in the figure. Considering the change in the supply terminal voltage with loading to be negligible, the magnitude of the voltage across the terminals V_AB in Volts is ____________ (Round off to the nearest integer).

Diagram for Electrical Engineering question 64

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A quadratic function of two variables is given as

The magnitude of the maximum rate of change of the function at the point (1,1) is ________ (Round off to the nearest integer).

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GATE EE topic:electrical-machines PYQs

Question 56

Question 57

Question 58

Question 59

Question 60

Question 61

Question 62

Question 63

Question 64

Question 65