Questions 71–80 of 130. Imported answers require independent review unless marked reviewed.

Topic practice 130 questionsPage 8 of 13

Question 36

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The output expression for the Karnaugh map shown below is
Diagram for Electrical Engineering question 36

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Question 36

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Which of the following systems has maximum peak overshoot due to a unit step input?
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Question 37

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The logical gate implemented using the circuit shown below where, V₁ and V₂ are inputs (with 0 V as digital 0 and 5 V as digital 1) and Vₒᵤₜ is the output, is
Diagram for Electrical Engineering question 37

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Question 37

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For the circuit shown in the figure below, it is given that

. The transistor has

and

when the B-E junction is forward biased.
Diagram for Electrical Engineering question 37

For this circuit, the value of

is
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Question 38

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The input voltage V_DC of the buck-boost converter shown below varies from 32 V to 72 V. Assume that all components are ideal, inductor current is continuous, and output voltage is ripple free. The range of duty ratio D of the converter for which the magnitude of the steady-state output voltage remains constant at 48 V is
Diagram for Electrical Engineering question 38

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Question 38

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For the circuit shown below, assume that the OPAMP is ideal.
Diagram for Electrical Engineering question 38

Which one of the following is TRUE?
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Question 39

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A load is supplied by a 230 V, 50 Hz source. The active power P and the reactive power Q consumed by the load are such that 1 kW ≤ P ≤ 2 kW and 1 kVAR ≤ Q ≤ 2 kVAR. A capacitor connected across the load for power factor correction generates 1 kVAR reactive power. The worst case power factor after power factor correction is
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Question 39

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The figure below shows a half-bridge voltage source inverter supplying an RL-load with

and

. The desired fundamental frequency of the load voltage is 50 Hz. The switch control signals of the converter are generated using sinusoidal pulse width modulation with modulation index,

. At 50 Hz, the RL-load draws an active power of 1.44 kW. The value of DC source voltage

in volts is
Diagram for Electrical Engineering question 39

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Question 40

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The bus admittance matrix for a power system network is

pu. There is a transmission line, connected between buses 1 and 3, which is represented by the circuit shown in figure.
Diagram for Electrical Engineering question 40

Reactance is 0.05 pu; susceptance is 0.05 pu at each end. If this transmission line is removed from service, what is the modified bus admittance matrix?
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Question 40

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A person decides to toss a fair coin repeatedly until he gets a head. He will make at most 3 tosses. Let the random variable

denote the number of heads. The value of

, where

denotes the variance, equals
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