Computer Science and Information Technology
2024 · Paper 2
Take it one question at a time. Try an answer, then check your understanding.
Complete GATE CSE 2024 Paper 2 overview, original pages and practice · Timed previous-paper practice
Questions 61–63 of 65. Imported answers require review unless explicitly marked reviewed.
Question 61
Open questionCSNAT2 marksNeeds review
A processor uses a 32-bit instruction format and supports byte-addressable memory access. The ISA of the processor has 50 distinct instructions. The instructions are equally divided into two types, namely R-type and I-type, whose formats are shown below.
R-type Instruction Format:
| OPCODE | UNUSED | DST Register | SRC Register1 | SRC Register 2 |
I-type Instruction Format:
| OPCODE | DST Register | SRC Register | # Immediate value/address |
In the OPCODE, 1 bit is used to distinguish between I-type and R-type instructions and the remaining bits indicate the operation. The processor has 50 architectural registers, and all register fields in the instructions are of equal size.
Let
be the number of bits used to encode the UNUSED field,
be the number of bits used to encode the OPCODE field, and
be the number of bits used to encode the immediate value/address field. The value of
is ________Log in to check the answer
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Open questionCSNAT2 marksNeeds review
Let
be the language represented by the regular expression
and
, where
denotes the length of string
. The number of strings in
which are also in
is ________Log in to check the answer
You can attempt this question now. Sign in to view the answer key, explanations and discussion.Log in to check answerQuestion 63
Open questionCSNAT2 marksNeeds review
Let
be the group of integers
with addition modulo
as the group operation. The number of elements in the group
that are their own inverses is ________Log in to check the answer
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