Complete GATE ECE 2020 Paper 1 overview, original pages and practice · Timed previous-paper practice

Questions 46–48 of 65. Imported answers require review unless explicitly marked reviewed.

Paper practice 65 questionsPage 16 of 22

Question 36

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An enhancement MOSFET of threshold voltage 3 V is being used in the sample and hold circuit given below. Assume that the substrate of the MOS device is connected to

V. If the input voltage

lies between

V, the minimum and the maximum values of

required for proper sampling and holding respectively, are
Diagram for Electronics and Communication Engineering question 36

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Question 37

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Using the incremental low frequency small-signal model of the MOS device, the Norton equivalent resistance of the following circuit is
Diagram for Electronics and Communication Engineering question 37

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Question 38

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ECMCQ2 marksNeeds review
P, Q, and R are the decimal integers corresponding to the 4-bit binary number 1100 considered in signed magnitude, 1’s complement, and 2’s complement representations, respectively. The 6-bit 2’s complement representation of (P + Q + R) is
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