Electronics and Communication Engineering
2025 · Paper 1
Take it one question at a time. Try an answer, then check your understanding.
Complete GATE ECE 2025 Paper 1 overview, original pages and practice · Timed previous-paper practice
Questions 43–45 of 65. Imported answers require review unless explicitly marked reviewed.
Question 43
Open questionECMCQ2 marksNeeds review
The identical MOSFETs M₁ and M₂ in the circuit given below are ideal and biased in the saturation region. M₁ and M₂ have a transconductance
of 5 mS.The input signals (in Volts) are:
The output signal
(in Volts) is ________. 
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Open questionECMCQ2 marksNeeds review
A 10-bit analog-to-digital converter (ADC) has a sampling frequency of 1 MHz and a full scale voltage of 3.3 V.
For an input sinusoidal signal with frequency 500 kHz, the maximum SNR (in dB, rounded off to two decimal places) and the data rate (in Mbps) at the output of the ADC are ________, respectively.
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You can attempt this question now. Sign in to view the answer key, explanations and discussion.Log in to check answerQuestion 45
Open questionECMCQ2 marksNeeds review
A positive-edge-triggered sequential circuit is shown below. There are no timing violations in the circuit. Input P0 is set to logic ‘0’ and P1 is set to logic ‘1’ at all times. The timing diagram of the inputs SEL and S are also shown below.
The sequence of output Y from time T₀ to T₃ is ________.
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