Instrumentation Engineering
2025 · Paper 1
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Complete GATE IN 2025 Paper 1 overview, original pages and practice · Timed previous-paper practice
Questions 64–65 of 65. Imported answers require review unless explicitly marked reviewed.
Question 64
Open questionINNAT2 marksNeeds review
A signal
V is applied to the circuit consisting of a switch S and capacitor C = 0.1
F, as shown in the figure. The output
of the circuit is fed to an ADC having an input impedance consisting of a 10 M
resistance in parallel with a 0.1
F capacitor. If S is opened at
s, the value of
at
s will be ______ V (rounded off to two decimal places).Note: Assume all components are ideal.
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Open questionINNAT2 marksNeeds review
For the circuit shown in the figure, the active power supplied by the source is ______ W (rounded off to one decimal place).
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