Computer Science and Information Technology
GATE CSE discipline:computing-and-data PYQs
Build your understanding with focused practice from past exam papers.
Questions 791–800 of 975. Imported answers require independent review unless marked reviewed.
Question 1
Open questionCSMCQ1 markNeeds review
Which one of the following is a closed form expression for the generating function of the sequence
, where
for all
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Open questionCSMCQ1 markNeeds review
Consider the following C program:
#include<stdio.h>
struct Uronde{
char x,y,z;
};
int main(){
struct Uronde p = {'1', '0', 'a'+2};
struct Uronde *q = &p;
printf("%c, %c", *((char*)q+1), *((char*)q+2));
return 0;
}
The output of this program is:
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Open questionCSMCQ1 markNeeds review
A queue is implemented using a non-circular singly linked list. The queue has a head pointer and a tail pointer, as shown in the figure. Let n denote the number of nodes in the queue. Let enqueue be implemented by inserting a new node at the head, and dequeue be implemented by deletion of a node from the tail.
Which one of the following is the time complexity of the most time-efficient implementation of enqueue and dequeue, respectively, for this data structure?
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Open questionCSMCQ1 markNeeds review
Let ⊕ and ⊙ denote the Exclusive OR and Exclusive NOR operations, respectively. Which one of the following is NOT CORRECT?
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Open questionCSMCQ1 markNeeds review
Consider the following processor design characteristics.
I. Register-to-register arithmetic operations only
II. Fixed-length instruction format
III. Hardwired control unit
Which of the characteristics above are used in the design of a RISC processor?
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Open questionCSMCQ1 markNeeds review
Let N be an NFA with n states. Let k be the number of states of a minimal DFA which is equivalent to N. Which one of the following is necessarily true?
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The set of all recursively enumerable languages is
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Which one of the following statements is FALSE?
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Open questionCSMCQ1 markNeeds review
The following are some events that occur after a device controller issues an interrupt while process L is under execution.
(P) The processor pushes the process status of L onto the control stack.
(Q) The processor finishes the execution of the current instruction.
(R) The processor executes the interrupt service routine.
(S) The processor pops the process status of L from the control stack.
(T) The processor loads the new PC value based on the interrupt.
Which one of the following is the correct order in which the events above occur?
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Open questionCSMCQ1 markNeeds review
Consider a process executing on an operating system that uses demand paging. The average time for a memory access in the system is M units if the corresponding memory page is in memory, and D units if the memory access causes a page fault. It has been experimentally measured that the average time taken for a memory access in the process is X units.
Which one of the following is the correct expression for the page fault rate experienced by the process?
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