Physics
GATE PH purpose:exam-prep PYQs
Build your understanding with focused practice from past exam papers.
Questions 421–430 of 650. Imported answers require independent review unless marked reviewed.
Question 21
Open questionPHNAT1 markNeeds review
A particle
undergoes strong decay
. The isospin of
is _____.Log in to check the answer
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Open questionPHNAT1 markNeeds review
For a complex variable
and the contour
taken in the counter clockwise direction,
_____.Log in to check the answer
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Let
be the momentum conjugate to the generalized coordinate
. If the transformation
is canonical, then
_____.Log in to check the answer
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Open questionPHNAT1 markNeeds review
A conducting sphere of radius 1 m is placed in air. The maximum number of electrons that can be put on the sphere to avoid electrical breakdown is about
, where
is an integer. The value of
is _____. Assume: Breakdown electric field strength in air is
V/m; Permittivity of free space
F/m; Electron charge
C.Log in to check the answer
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If a particle is moving along a sinusoidal curve, the number of degrees of freedom of the particle is ___.
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Open questionPHMCQ2 marksNeeds review
The product of eigenvalues of
isYour answerChoose one option.
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Open questionPHMCQ2 marksNeeds review
Let
,
and
. Let
. Let
denote the three-dimensional real vector space. Which one of the following is correct?Your answerChoose one option.
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Open questionPHMCQ2 marksNeeds review
denotes the spin operator defined as
. Which one of the following is correct?Your answerChoose one option.
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Open questionPHMCQ2 marksNeeds review
The input voltage (V
) to the circuit shown in the figure is
V. The output voltage (V
) is
V. If R = 1 k
, the value of C (in
F) is 
Your answerChoose one option.
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Open questionPHMCQ2 marksNeeds review
Consider a 4-bit counter constructed out of four flip-flops. It is formed by connecting the J and K inputs to logic high and feeding the Q output to the clock input of the following flip-flop (see the figure). The input signal to the counter is a series of square pulses and the change of state is triggered by the falling edge. At time
the outputs are in logic low state (
). Then at
, the logic state of the outputs is 
Your answerChoose one option.
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