GATE PH · 2020 · PH
Question 30: Electronics
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Question 30
PHMCQ2 marksNeeds review
Consider a 4-bit counter constructed out of four flip-flops. It is formed by connecting the J and K inputs to logic high and feeding the Q output to the clock input of the following flip-flop (see the figure). The input signal to the counter is a series of square pulses and the change of state is triggered by the falling edge. At time
the outputs are in logic low state (
). Then at
, the logic state of the outputs is 
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2020PH
GATE PH 2020 · Paper 1
Physics · Original paper archive
- Section
- Physics
- Question type
- Multiple choice (MCQ)
- Marks
- 2 marks
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