Complete GATE CSE 2023 Paper 1 overview, original pages and practice · Timed previous-paper practice

Questions 40–42 of 65. Imported answers require review unless explicitly marked reviewed.

Paper practice 65 questionsPage 14 of 22

Question 40

Open question
CSMCQ2 marksNeeds review
Consider the pushdown automaton (PDA)

below, which runs on the input alphabet

, has stack alphabet

, and has three states

, with

being the start state. A transition from state

to state

, labelled

, where

is an input symbol or

,

is a stack symbol, and

is a string of stack symbols, represents the fact that in state

, the PDA can read

from the input, with

on the top of its stack, pop

from the stack, push in the string

on the stack, and go to state

. In the initial configuration, the stack has only the symbol

in it. The PDA accepts by empty stack.
Which one of the following options correctly describes the language accepted by

?
Diagram for Computer Science and Information Technology question 40

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Question 41

Open question
CSMCQ2 marksNeeds review
Consider the given C-code and its corresponding assembly code, with a few operands U1–U4 being unknown. Some useful information as well as the semantics of each unique assembly instruction is annotated as inline comments in the code. The memory is byte-addressable.
//C-code ;assembly-code (; indicates comments)
;r1-r5 are 32-bit integer registers
;initialize r1=0, r2=10
;initialize r3, r4 with base address of a, b
int a[10], b[10], i; L01: jeq r1, r2, end ;if(r1==r2) goto end
// int is 32-bit L02: lw r5, 0(r4) ;r5 <- Memory[r4+0]
for (i=0; i<10; i++) L03: shl r5, r5, U1 ;r5 <- r5 << U1
a[i] = b[i] * 8; L04: sw r5, 0(r3) ;Memory[r3+0] <- r5
L05: add r3, r3, U2 ;r3 <- r3+U2
L06: add r4, r4, U3
L07: add r1, r1, 1
L08: jmp U4 ;goto U4
L09: end
Which one of the following options is a CORRECT replacement for operands in the position (U1, U2, U3, U4) in the above assembly code?
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Question 42

Open question
CSMCQ2 marksNeeds review
A 4 kilobyte (KB) byte-addressable memory is realized using four 1 KB memory blocks. Two input address lines (IA4 and IA3) are connected to the chip select (CS) port of these memory blocks through a decoder as shown in the figure. The remaining ten input address lines from IA11–IA0 are connected to the address port of these blocks. The chip select (CS) is active high.
The input memory address (IA11–IA0), in decimal, for the starting locations (Addr=0) of each block (indicated as X1, X2, X3, X4 in the figure are among the options given below. Which one of the following options is CORRECT?
Diagram for Computer Science and Information Technology question 42

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