Electronics and Communication Engineering
2021 · Paper 1
Take it one question at a time. Try an answer, then check your understanding.
Complete GATE ECE 2021 Paper 1 overview, original pages and practice · Timed previous-paper practice
Questions 40–42 of 65. Imported answers require review unless explicitly marked reviewed.
Question 30
Open questionECMCQ2 marksNeeds review
For an n-channel silicon MOSFET with 10 nm gate oxide thickness, the substrate sensitivity
is found to be 50 mV/V at a substrate voltage
V, where
is the threshold voltage of the MOSFET. Assume that,
, where
is the separation between the Fermi energy level
and the intrinsic level
in the bulk. Parameters given areElectron charge
C
Vacuum permittivity
F/m
Relative permittivity of silicon
Relative permittivity of oxide
The doping concentration of the substrate is
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Open questionECMCQ2 marksNeeds review
The propagation delays of the XOR gate, AND gate and multiplexer (MUX) in the circuit shown in the figure are 4 ns, 2 ns and 1 ns, respectively.
If all the inputs P, Q, R, S and T are applied simultaneously and held constant, the maximum propagation delay of the circuit is
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You can attempt this question now. Sign in to view the answer key, explanations and discussion.Log in to check answerQuestion 32
Open questionECMCQ2 marksNeeds review
The content of the registers are R₁ = 25H, R₂ = 30H and R₃ = 40H. The following machine instructions are executed.
PUSH{R₁}
PUSH{R₂}
PUSH{R₃}
POP{R₁}
POP{R₂}
POP{R₃}
After execution, the content of registers R₁, R₂, R₃ are
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