GATE CSE · 2024 · CS
Question 58: Computer Organization and Architecture
Give it a try, then reveal the answer to check your work.
Question 58
CSNAT2 marksNeeds review
A non-pipelined instruction execution unit operating at 2 GHz takes an average of 6 cycles to execute an instruction of a program P. The unit is then redesigned to operate on a 5-stage pipeline at 2 GHz. Assume that the ideal throughput of the pipelined unit is 1 instruction per cycle. In the execution of program P, 20% instructions incur an average of 2 cycles stall due to data hazards and 20% instructions incur an average of 3 cycles stall due to control hazards. The speedup (rounded off to one decimal place) obtained by the pipelined design over the non-pipelined design is ________
Log in to check the answer
You can attempt this question now. Sign in to view the answer key, explanations and discussion.Log in to check answerEXPLORE & PRACTISE
Paper and topic context
See where this question comes from and choose what to practise next.
2024CS
GATE CSE 2024 · Paper 2
Computer Science and Information Technology · Original paper archive
- Section
- Computer Science and Information Technology
- Question type
- Numerical answer (NAT)
- Marks
- 2 marks
Practise related topics
Explore more previous year questions using this question’s imported topic tags.
computer science
GATE CSE previous year questions
information technology
GATE CSE previous year questions
computing
GATE CSE previous year questions
computer organization and architecture
GATE CSE previous year questions
Comments
Ask a question, share your approach, or help someone understand.
Log in to view the discussion
You’re not logged in. Log in or create an account to see discussions and add comments.