GATE CSE · 2026 · CS
Question 15: Computer Organization and Architecture
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Question 15
CSMCQ1 markNeeds review
Consider a processor P whose instruction set architecture is the load-store architecture. The instruction format is such that the first operand of any instruction is the destination operand.
Which one of the following sequences of instructions corresponds to the high-level language statement Z = X + Y?
Note: X, Y, and Z are memory operands. R0, R1, and R2 are registers.
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2026CS
GATE CSE 2026 · Paper 1
Computer Science and Information Technology · Original paper archive
- Section
- Computer Science and Information Technology
- Question type
- Multiple choice (MCQ)
- Marks
- 1 mark
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