Computer Science and Information Technology
GATE CSE concept:sequential-circuits PYQs
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How to practice concept:sequential-circuits
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Questions 1–4 of 4. Imported answers require independent review unless marked reviewed.
Question 37
Open questionCSMCQ2 marksNeeds review
Consider a 2-bit saturating up/down counter that performs the saturating up count when the input P is 0, and the saturating down count when P is 1. The Next State table of the counter is as shown. The counter is built as a synchronous sequential circuit using D flip-flops.
[Table: Input P, Current State Q₁ Q₀, Next State Q₁⁺ Q₀⁺; rows (P,Q₁,Q₀ → Q₁⁺,Q₀⁺): (0,0,0→0,1), (0,0,1→1,0), (0,1,0→1,1), (0,1,1→1,1), (1,0,0→0,0), (1,0,1→0,0), (1,1,0→0,1), (1,1,1→1,0).]
Which one of the following options corresponds to the expressions for the inputs of the D flip-flops, D₁ and D₀?
Your answerChoose one option.
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You can attempt this question now. Sign in to view the answer key, explanations and discussion.Log in to check answerQuestion 60
Open questionCSNAT2 marksNeeds review
Consider the given sequential circuit designed using D-Flip-flops. The circuit is initialized with some value (initial state). The number of distinct states the circuit will go through before returning back to the initial state is ______ . (Answer in integer)
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You can attempt this question now. Sign in to view the answer key, explanations and discussion.Log in to check answerQuestion 22
Open questionCSNAT1 markNeeds review
Consider the sequential circuit shown in the figure, where both flip-flops used are positive edge-triggered D flip-flops.
The number of states in the state transition diagram of this circuit that have a transition back to the same state on some value of “in” is ____.
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You can attempt this question now. Sign in to view the answer key, explanations and discussion.Log in to check answerQuestion 42
Open questionCSMCQ2 marksNeeds review
The next state table of a 2-bit saturating up-counter is given below.
Q₁ | Q₀ | Q₁⁺ | Q₀⁺ |
|---|---|---|---|
0 | 0 | 0 | 1 |
0 | 1 | 1 | 0 |
1 | 0 | 1 | 1 |
1 | 1 | 1 | 1 |
The counter is built as a synchronous sequential circuit using T flip-flops. The expressions for T₁ and T₀ are
Your answerChoose one option.
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