GATE CSE year:2026 PYQs & Answers — Page 12

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Questions 111–120 of 130. Imported answers require independent review unless marked reviewed.

Topic practice 130 questionsPage 12 of 13

An ISP having an address block 202.16.0.0/15 assigns a block of 600 IP addresses to a client, using the classless inter domain routing (CIDR) super-netting approach. Which of the following address blocks can be assigned by the ISP?

Your answerSelect all correct options. You can choose more than one.

202.16.0.0/19

202.17.64.0/19

202.16.32.0/19

202.17.24.0/19

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Consider a system with 1 MB physical memory and a word length of 1 byte. The system uses a direct mapped cache, with block numbers starting from 0. The word with physical address 0xA2C28 is mapped to the cache block number 176₁₀. The maximum possible size of the cache (in KB) for this configuration is __________. (answer in integer)

Note: 1K=2¹⁰ and 1M=2²⁰

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Let

be an undirected graph, which is a path on 8 vertices. The number of matchings in

is _____. (answer in integer)

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A non-pipelined instruction execution unit that operates at 1.6 GHz clock takes an average of 5 clock cycles to complete the execution of an instruction. To improve the performance, the system was pipelined with a goal of achieving an average throughput of one instruction per clock cycle. However, it could operate only at 1.2 GHz due to pipeline overheads. While executing a program in the pipelined design, 30% of instructions encountered a stall of 2 cycles due to pipeline hazards. The speed-up obtained by the pipelined design over the non-pipelined one for this program is __________. (rounded off to two decimal places)

Note: 1G=10⁹

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Let

be a random variable which takes values in the set

. Further,

and

. The expected value of

, denoted by

, is equal to __________. (rounded off to two decimal places)

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Consider a new TCP connection between a sender and a receiver. The receiver advertised window is constant at 48 KB, the maximum segment size (MSS) is 2 KB, and the slow start threshold for TCP congestion control is 16 KB. Assume that there are no timeouts or duplicate acknowledgements. The number of rounds of transmission required for the congestion control algorithm of the TCP connection to reach the congestion avoidance phase is __________. (answer in integer)

Note: 1K=2¹⁰

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Consider a hard disk with a rotational speed of 1500 rpm. The time to move the read/write head from a track to its adjacent track is 1 millisecond. Initially, the head is on track 0. The number of sectors per track is 400. The sector size is 1024 bytes. It is necessary to transfer data from 10 randomly located sectors in each of the following tracks in the order: 5, 12 and 7. The total time for the data transfer (in milliseconds) from the hard disk is ________. (rounded off to one decimal place)

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Consider the digital circuit shown below with two input lines A and B, two select lines S0 and S1, and an output line Y. The blocks Q and M represent active high 2:4 decoder and 4-to-1 multiplexer, respectively. Out of 16 possible input combinations, the number of combinations that produce Y=1 is __________. (answer in integer)

Note: One input combination is an instance of [A B S1 S0].

Diagram for Computer Science and Information Technology question 59

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The EX stage of a pipelined processor performs the memory read operations for LOAD instructions, and the operations for the arithmetic and logic instructions. Let

denote the time taken by the EX stage to perform the operation for an instruction. For each instruction type, the values of

and

(the number of instructions of that type in a sequence of 100 instructions for a program P), are given in the table below. The duration of the pipeline clock cycle is 1 nanosecond. Assume that the latch time for the interstage buffers in the pipeline is negligible. Table (Instruction,

in nanoseconds,

): LOAD, 1.8, 15; MUL, 1.5, 10; IDIV, 2.5, 5; FADD, 1.7, 10; FSUB, 1.7, 5; FMUL, 2.8, 15; FDIV, 3.2, 5; All other instructions, Less than 1.0, 35. When program P is executed, the number of clock cycles for which the pipeline is stalled due to structural hazards in the EX stage is _____. (answer in integer)

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Consider the following ANSI-C program.

#include<stdio.h>

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GATE CSE year:2026 PYQs

Question 56

Question 56

Question 57

Question 57

Question 58

Question 58

Question 59

Question 59

Question 60

Question 60