GATE CSE · 2020 · CS
Question 53: Computer Organization and Architecture
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Question 53
CSNAT2 marksNeeds review
Consider a page system that uses 1-level page table residing in main memory and a TLB for address translation. Each main memory access takes 100 ns and TLB lookup takes 20 ns. Each page transfer to/from the disk takes 500 ns. Assume that the TLB hit ratio is 95%, page fault rate is 10%. Assume that for 20% of the total page faults, a dirty page has to be written back to disk before the required page is read in from disk. TLB update time is negligible. The average memory access time in ns (round off to 1 decimal places) is ______.
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2020CS
GATE CSE 2020 · Paper 1
Computer Science and Information Technology · Original paper archive
- Section
- Computer Science and Information Technology
- Question type
- Numerical answer (NAT)
- Marks
- 2 marks
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