GATE CSE · 2024 · CS1
Question 56: Computer Organization and Architecture
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Question 56
CS1NAT2 marksNeeds review
A given program has 25% load/store instructions. Suppose the ideal CPI (cycles per instruction) without any memory stalls is 2. The program exhibits 2% miss rate on instruction cache and 8% miss rate on data cache. The miss penalty is 100 cycles. The speedup (rounded off to two decimal places) achieved with a perfect cache (i.e., with NO data or instruction cache misses) is ________
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2024CS1
GATE CSE 2024 · Paper 1
Computer Science and Information Technology · Original paper archive
- Section
- Section CS1
- Question type
- Numerical answer (NAT)
- Marks
- 2 marks
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