GATE CSE 2024 CS1 Q53: Computer Organization and Architecture

Consider two set-associative cache memory architectures: WB, which uses the write back policy, and WT, which uses the write through policy. Both of them use the LRU (Least Recently Used) block replacement policy. The cache memory is connected to the main memory. Which of the following statements is/are TRUE?

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A read miss in WB never evicts a dirty block

A read miss in WT never triggers a write back operation of a cache block to main memory

A write hit in WB can modify the value of the dirty bit of a cache block

A write miss in WT always writes the victim cache block to main memory before loading the missed block to the cache

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Section: Section CS1
Question type: Multiple select (MSQ)
Marks: 2 marks

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Question 53: Computer Organization and Architecture

Question 53

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GATE CSE 2024 · Paper 1

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Question 53

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Paper and topic context

GATE CSE 2024 · Paper 1

Practise related topics

computer science

information technology

computing

computer organization and architecture

cache

main memory

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